In recent times, technological investment and advancement has been made in laser micro-machining systems to drill micro-holes (referred to as micro-vias) in thin layer materials to establish pathways between printed circuit board layers. In these processes, the hole drilling process is typically followed by a plating process of the micro-vias to establish electrical connection or conductivity between the layers. In this type of drilling, it is typical that the micro-via cross sectional geometry, i.e. the via top and bottom hole diameters and the steepness or taper of the via sidewall, were not specifically required or could vary so long as the electrical performance of the plated vias was not affected. For example, it is typical that the electrical performance of the plated vias are primarily determined by their top and bottom diameters and an important consideration was the roughness of the via wall as relatively large protrusions into the via cavity may interfere with the plating process. Respecting the via geometry, the typical specification requirements for such applications were simply biased toward steeper and smoother via walls.